1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device in which data is electrically written/erased, and more particularly to a nonvolatile semiconductor memory device having a stacked gate structure, and the manufacturing method thereof.
2. Description of the Related Art
Generally, in a manufacturing process of an MOS type semiconductor device, polysilicon as an electrode material is exposed on a sidewall portion of a gate electrode immediately after forming the gate electrode with use of etching, and an edge of the gate oxide film is damaged by the etching. Therefore, recovery due to post oxidation from the damage and the gate electrode encapsulation with an insulating film are required. In case of a nonvolatile memory having a stacked gate structure in particular, since electric charges are held in a floating gate, a film quality of a gate oxide film in the vicinity of a corner portion of the floating gate greatly affects characteristics of a device. Accordingly, many proposals have been made in relation to an improvement in a gate corner portion.
For example, in Jpn. Pat. Appln. KOKAI No. 1999-154711, after an SiON film is selectively formed on the sidewall of the floating gate and the top and sidewall of the control gate, annealing in an oxidation atmosphere is performed as the post oxidation. This process promotes the growth of an oxidation film at an edge portion of the tunneling oxide film or the inter-poly dielectric. In this way, formation of the SiON film on the sidewall of the floating gate prevents the oxidation of that portion, and at the same time the corners of the floating gate edge are rounded.
On the other hand, Jpn. Pat. Appln. KOKAI No. 2003-31705 discloses a semiconductor device in which an ONO film (composite film composed of a silicon oxide film/a silicon nitride film/a silicon oxide film) is used as an inter-electrode dielectric of a stacked gate and a gate sidewall insulating film is also provided. The gate sidewall insulating film is formed with use of radical oxidation, and the corners of the floating gate and control gate contacting the ONO film are rounded, thereby relaxing the electric field concentration at the gate edges. Further, a preferable relation between the inter-poly dielectric and the radius of curvature of the gate corners is proposed.
Further, in a floating gate type nonvolatile memory having a tunneling insulating film and an inter-electrode insulating film, in order to suppress leakage current flowing through the inter-electrode insulating film, a film thickness of this insulating film is usually increased to reduce an electric field applied thereto. Since a capacitance of the inter-electrode insulating film is lowered with an increase in the film thickness, a surface area of a floating gate electrode must be increased. Usually, a surface of the floating gate electrode on which the inter-electrode insulating film is formed is not formed into a simple planar shape but three-dimensionally protruded to increase a capacitor area, thus increasing the capacitance. Here, as a problem in three-dimensional formation, several convex portions are necessarily formed in the three-dimensional capacitor in some cases. When a voltage is applied to a control gate electrode, an electric field is concentrated on such a convex portion, and hence this portion serves as a main path of leakage current. Furthermore, since a current is concentrated, deterioration in dielectric breakdown strength locally occurs, which induces degradation in electrical reliability.
Moreover, although polysilicon is usually used for a floating gate electrode, there is surface roughness because of existence of a grain boundary, and hence uniform surface morphology cannot be obtained. An increase in leakage current due to concentration of an electric field can be observed at a part having such roughness, resulting in deterioration in electrical reliability. How such roughness in a three-dimensional capacitor is controlled to suppress leakage current is very important.
Meanwhile, in a prior art known in the patent reference mentioned above and the like, since a bird's beak type oxidized region is formed at an end portion of an inter-electrode insulating film of a stacked gate, there is a problem of a reduction in the capacitance of the inter-electrode insulating film and a reduction in a coupling ratio between stacked gates. Additionally, control over roughness in a surface of the three-dimensional capacitor of a stacked gate (control over roughness in an upper surface of a floating gate in particular) and suppression of leakage current through the inter-electrode insulating film are serious problems.
Therefore, there has been demanded realization of a nonvolatile semiconductor memory device in which leakage current is suppressed through an inter-electrode insulating film to improve electrical reliability and the manufacturing method thereof.